fpga controller memory test

finite state machine and block diagram for a memory test game, vhdl on an fpga, plus digilent pmod i/o.

a simon-style memory game on an fpga in vhdl: state machine and controller laid out in a block diagram, then built out so all game behavior lives in the hardware design, not just simulation, with digilent pmods hooking up real inputs and outputs on the board.

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